The present invention relates to a method for fabricating a semiconductor device and, more particularly, to a method for fabricating a semiconductor device with a recess gate.
As semiconductor devices have been highly integrated, a channel length of a memory cell transistor becomes shorter, so that refresh characteristics of the device have been significantly degraded.
In order to solve the above problem, a recess gate process has been suggested. According to the recess gate process, a predetermined gate region formed on an active area of a substrate is etched to form a recess, and a gate is formed on the recess to fabricate the transistor, so that the channel length is increased, thereby enhancing the refresh characteristics of the device. In addition, as the integration degree has been gradually increased, a bulb-type recess gate process has been suggested. According to the bulb type recess gate process, the recess is formed through a two-step etching process, so that the channel length is further increased.
Hereinafter, the recess gate process or the bulb-type recess gate process will be briefly described.
First, the substrate is selectively etched to form the recess. In this case, the recess may have various profiles (for example, a vertical type or a bulb type). After that, a gate insulation layer, a polysilicon layer, a metal layer and a hard mask nitride layer are sequentially deposited on the entire surface of a resultant structure having the recess, and then are patterned, thereby forming a gate pattern.
In the above recess gate process, the alignment between the recess pattern and the gate pattern is a critical factor. However, since the pattern has a micro-size due to the high integration of the device, it is difficult to precisely align a recess mask layer and a gate mask layer, so that a misalignment occurs between the gate pattern and the recess (See FIG. 1). Such a misalignment prevents a contact area from being open in the following process for forming a landing plug contact, and causes a short when depositing landing plug polysilicon. As a result, the characteristics of the device and product yield are deteriorated.